Deep-tech Work India
Represent Data Patterns? Suggest an edit Artificial Intelligence & Computing

Data Patterns

Designs and manufactures electronic systems for defence and aerospace applications.

Company website View 8 Open Roles Careers page

Frequently Required Skills

C++ 2 VHDL 2 RTL Design 2 FPGA 2 EMI / EMC 1 Embedded Linux 1 Verilog 1 Physical Design 1 Signal Processing 1

Hiring Departments

Project Management Group (PRJ_PRJ)System Design (PRJ_SYS)FPGA Development Group (HDD_FPG)Driver Development Group (SDG_DRV)Application Development Group (SDG_APP)

Typical Experience Levels

10+ Years (Lead)Fresher / Entry Level6–9 Years (Senior)2–5 Years

Hiring Trend

May 26 2
Aug 26 1
Sept 26 5

Hiring in Cities

ChennaiThiruvananthapuram

Current Open Roles

8 indexed roles
Data Patterns 30 Sept 2026

Deputy General Manager Programs

Project Management Group (PRJ_PRJ) · Siruseri, Chennai, Tamil Nadu, India · Permanent

Program Management
Data Patterns 28 Sept 2026

System Engineer

System Design (PRJ_SYS) · Siruseri, Chennai, Tamil Nadu, India · Permanent

Electrical Engineering EMI / EMC
Data Patterns 22 Sept 2026

Engineer SDG

Driver Development Group (SDG_DRV) · Siruseri, Chennai, Tamil Nadu, India · Permanent

AI / Machine LearningEmbedded Systems C++Embedded Linux
Data Patterns 22 Sept 2026

Senior Lead PRJ

Project Management Group (PRJ_PRJ) · Siruseri, Chennai, Tamil Nadu, India · Permanent

Program Management
Data Patterns 22 Sept 2026

Senior System Engineer

System Design (PRJ_SYS) · Siruseri, Chennai, Tamil Nadu, India · Permanent

Electrical Engineering
Data Patterns 13 Aug 2026

Engineer SDG

Application Development Group (SDG_APP) · Kowdiar, Thiruvananthapuram, Kerala, India · Permanent

Embedded Systems C++
Data Patterns 29 May 2026

Senior Engineer HDD

FPGA Development Group (HDD_FPG) · Siruseri, Chennai, Tamil Nadu, India · Permanent

FPGA VerilogVHDLRTL Design
Data Patterns 21 May 2026

Engineer HDD

FPGA Development Group (HDD_FPG) · Siruseri, Chennai, Tamil Nadu, India · Permanent

FPGA VHDLRTL DesignFPGA

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