Role : Take up ownership of physical verification and Reliability of blocks and fullchip_Desired Skills:_ * Interaction with Physical designers on DRC, LVS, manufacturing and reliability targets. * PV and IR/EM flow development exposure. * Understanding DRM and EM rules of target technology. * Come up with strategies for faster physical verification and reliability closure. * Should be able to understand the power intent of design and analog integration guidelines. * Should be good in debug and analysis. * Ability to own milestone and schedule tracking for DRC/LVS/ANTENNA clean ups at block level and fullchip level. * Implementation experience on IR/EM analysis and fixes. * Should be having working knowledge in innovus/icc2 and klayout/virtuoso * Have low power implementation experience & should be good in scripting.