What You
ll Need:
* Experience leading DV team comprising 5-10 engineers.
* Hands on experience on IP, Subsystem and SoC Design Verification experience
* Experience UVM test benches and Scoreboard development.
* Work with the team to improve DV methodology and infrastructure
* Strong experience in debugging complex issues
* Sound expertise in Testplan, Project Planning and Testbench Architecture
* Experience working on UCI, PCIe, DDR, NoC (Fabric) is an added advantage.
* Experience in GLS is a plus.
What you will be doing:
Provide technical and project leadership to a team of DV engineers. Your responsibilities include architecting and bringing up advanced UVM test benches and scoreboards for complex designs, coupled with comprehensive project planning and task scheduling. You will drive complete verification of project ownership, from testplan development to final coverage sign-off. A key aspect of this role is developing and implementing innovative verification methodologies to improve overall effectiveness and efficiency. Proven proficiency in scripting languages such as Python, Shell, TCL, or Perl is a must.
Deep-tech Work India