Tessolve 14 May 2026
Digital · Noida, Uttar Pradesh, India, Electronic City, Bengaluru, Karnataka, India, Guindy, Chennai, Tamil Nadu, India, Jubilee Hills, Hyderabad, Telangana, India, ORR, Bengaluru, Karnataka, India, Whitefield, Bengaluru, Karnataka, India · Regular Employee - Probation
Backend EngineeringFrontend EngineeringEmbedded Systems PythonSystemVerilogCAN/LIN
Tessolve 13 May 2026
Digital · Noida, Uttar Pradesh, India, Electronic City, Bengaluru, Karnataka, India, Jubilee Hills, Hyderabad, Telangana, India, ORR, Bengaluru, Karnataka, India · Regular Employee - Probation
Backend EngineeringFrontend EngineeringEmbedded Systems PythonSystemVerilogCAN/LIN
KeenSemi Date not provided
Noida, Bangalore and Hyderabad
FPGA VerilogSystemVerilogVHDL
Logic Fruit Technologies Date not provided
Gurugram/Bengaluru
FPGA SystemVerilogEmbedded CRTL Design
Logic Fruit Technologies Date not provided
Gurugram/Bengaluru
VLSIFPGA VerilogSystemVerilogVHDL
KeenSemi Date not provided
Noida, Bangalore and Hyderabad
VLSI VerilogSystemVerilogVHDL
KeenSemi Date not provided
Noida, Bangalore and Hyderabad
Semiconductor Design VerilogSystemVerilogVHDL