QNu Labs 27 Jul 2026
Bangalore · Full-time
FPGASemiconductor Design VerilogSystemVerilogVHDL
QNu Labs 7 Jul 2026
Bangalore · Full-time
Embedded SystemsVLSIFPGA SystemVerilogVHDLLinux
Tessolve 22 Jun 2026
Digital · Electronic City, Bengaluru, Karnataka, India, Ekkaduthangal, Chennai, Tamil Nadu, India, Guindy, Chennai, Tamil Nadu, India, Sarjapur Road, Bengaluru, Karnataka, India · Regular Employee - Probation
VLSISemiconductor DesignElectrical Engineering VerilogSystemVerilogRTL Design
Tessolve 14 May 2026
Digital · Noida, Uttar Pradesh, India, Electronic City, Bengaluru, Karnataka, India, Guindy, Chennai, Tamil Nadu, India, Jubilee Hills, Hyderabad, Telangana, India, ORR, Bengaluru, Karnataka, India, Whitefield, Bengaluru, Karnataka, India · Regular Employee - Probation
Backend EngineeringFrontend EngineeringEmbedded Systems PythonSystemVerilogCAN/LIN
Tessolve 14 May 2026
Digital · Electronic City, Bengaluru, Karnataka, India, Whitefield, Bengaluru, Karnataka, India, Jubilee Hills, Hyderabad, Telangana, India · Regular Employee - Confirmed
Backend EngineeringFrontend EngineeringEmbedded Systems PythonSystemVerilogCAN/LIN
Tessolve 13 May 2026
Digital · Noida, Uttar Pradesh, India, Electronic City, Bengaluru, Karnataka, India, Jubilee Hills, Hyderabad, Telangana, India, ORR, Bengaluru, Karnataka, India · Regular Employee - Probation
Backend EngineeringFrontend EngineeringEmbedded Systems PythonSystemVerilogCAN/LIN
Tessolve 11 May 2026
Digital · Electronic City, Bengaluru, Karnataka, India · Regular Employee - Confirmed
Semiconductor DesignElectrical Engineering PythonSystemVerilogVerification
Astrome Technologies 16 Apr 2026
Software · Bengaluru · Full Time
FPGA VerilogSystemVerilogRTL Design
Moschip 13 Jan 2026
SES · Bangalore, Hyderabad · Full Time
VLSI CC++Verilog
Moschip 8 Jan 2026
SES · Bangalore, Hyderabad · Full Time
VLSI CC++Verilog
Moschip 8 Jan 2026
SES · Bangalore, Hyderabad · Full Time
VLSI CC++Verilog
UNMANND 30 Aug 2025
Bengaluru, Karnataka · Full time
VLSI CC++Verilog
Moschip 12 Nov 2024
Emulation · Hyderabad · Full Time
Semiconductor Design PythonCC++
LeadIC Design Date not provided
Engineering · Hyderabad / Bengaluru · Full Time
Semiconductor Design PythonVerilogSystemVerilog
LeadIC Design Date not provided
Engineering · Hyderabad · Full Time
Semiconductor Design VerilogSystemVerilogVerification
KeenSemi Date not provided
Noida, Bangalore and Hyderabad
FPGA VerilogSystemVerilogVHDL
Logic Fruit Technologies Date not provided
Gurugram/Bengaluru
FPGA SystemVerilogEmbedded CRTL Design
Tonbo Imaging Date not provided
India
FPGA PythonSystemVerilogCAN/LIN
Logic Fruit Technologies Date not provided
Gurugram/Bengaluru
VLSIFPGA VerilogSystemVerilogVHDL
Edveon Technologies Date not provided
Chennai / USA
Semiconductor Design PythonVerilogSystemVerilog
Interex Semiconductor Date not provided
Semiconductor Design PythonVerilogSystemVerilog
Interex Semiconductor Date not provided
Frontend EngineeringFirmware EngineeringVLSI PythonVerilogSystemVerilog
KeenSemi Date not provided
Noida, Bangalore and Hyderabad
VLSI VerilogSystemVerilogVHDL
KeenSemi Date not provided
Noida, Bangalore and Hyderabad
Semiconductor Design VerilogSystemVerilogVHDL
