Edveon Technologies

Senior Chip Design Verification Engineer

Chennai / USA · 6+ Years

Posted
Date not provided
Last verified at source
21 days ago
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We are looking for a highly experienced and skilled Chip Design Verification Engineer to join our team. The ideal candidate will have extensive experience in chip design and verification methodologies, with a proven track record of ensuring the functional correctness of complex integrated circuits (ICs). As a senior member of the team, you will be responsible for leading verification efforts, mentoring junior engineers, and ensuring that our designs meet the highest quality standards.

Key Responsibilities:

  • Lead and manage verification activities for complex chip designs, ensuring functional correctness and design quality.
  • Develop, implement, and execute comprehensive verification plans and testbenches using industry-standard verification tools and methodologies (e.g., UVM, SystemVerilog, Verilog).
  • Perform simulation, debugging, and analysis of verification results to identify issues and ensure resolution.
  • Work closely with design engineers to understand chip functionality and design specifications, and provide feedback on design for verification purposes.
  • Collaborate with the broader team on the integration of functional, performance, and power-related verification.
  • Lead formal verification, regression testing, and sign-off processes to ensure all requirements are met.
  • Use scripting languages (e.g., Python, Perl, TCL) for automation of verification tasks.
  • Mentor and guide junior engineers in best practices, methodologies, and tools.
  • Communicate effectively with cross-functional teams and stakeholders, providing regular updates and status reports.

Required Qualifications:

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or a related field.
  • 6+ years of hands-on experience in chip design verification, with a deep understanding of ASIC/SoC verification processes.
  • Expertise in verification methodologies, such as UVM, OVM, or eRM, with a focus on functional verification.
  • Solid programming skills in SystemVerilog, Verilog, and scripting languages (Python, Perl, TCL).
  • Strong knowledge of digital design concepts, timing analysis, and debugging techniques.
  • Experience with both RTL and gate-level simulation.

Why Join us?

  • Opportunity to work on cutting-edge chip designs for innovative products.
  • Work with a dynamic and skilled team of engineers.
  • Competitive salary and benefits package.
  • Career growth opportunities in a fast-evolving field.