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Verilog

45 indexed roles.

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LeadIC Design Date not provided

AMS Verification (DV oriented)

Engineering · Hyderabad / Bengaluru · Full Time

Semiconductor Design PythonVerilogSystemVerilog
LeadIC Design Date not provided

AMS Verification with Memory

Engineering · Hyderabad · Full Time

Semiconductor Design VerilogSystemVerilogVerification
KeenSemi Date not provided

Design Engineer - FPGA

Noida, Bangalore and Hyderabad

FPGA VerilogSystemVerilogVHDL
KeenSemi Date not provided

Design Engineer-RTL

Noida, Bangalore and Hyderabad

VLSI PythonVerilogRTL Design
Digantara Industries Date not provided

Director Satellite OBC

OBC · Bengaluru · Full Time

Aerospace Engineering CC++MATLAB
Innosilica Date not provided

Senior Member Technical Staff

Bangalore, Hyderabad, Noida

VLSISemiconductor DesignElectrical Engineering VerilogVHDLVerification
Interex Semiconductor Date not provided

Sr/Lead Design Engineer

Frontend EngineeringFirmware EngineeringVLSI PythonVerilogSystemVerilog
Innosilica Date not provided

STA Engineer

Bangalore, Hyderabad, Noida

Semiconductor Design VerilogVerificationPhysical Design
KeenSemi Date not provided

Verification Engineer

Noida, Bangalore and Hyderabad

Semiconductor Design VerilogSystemVerilogVHDL